M95256-DRMN3TP/K Datasheet PDF - ST Microelectronics

Description

●The M95256, M95256-W, M95256-R and M95256-DR are electrically erasable programmable memory (EEPROM) devices. They are accessed by a high speed SPI compatible bus. Their memory array is organized as 32768 × 8 bits. The M95256-DR also offers an additional page, named the Identification Page (64 bytes) which can be written and (later) permanently locked in Read-only mode. This Identification Page offers flexibility in the application board production line, as the Identification Page can be used to store unique identification parameters and/or parameters specific to the production line.

●Features

●■ Compatible with the Serial Peripheral Interface (SPI) bus

●■ Memory array

●– 256 Kb (32 Kbytes) of EEPROM

●– Page size: 64 bytes

●■ Additional Write lockable Page (Identification page)

●■ Write

●– Byte Write within 5 ms

●– Page Write within 5 ms

●■ Write Protect: quarter, half or whole memory array

●■ High-speed clock frequency (20 MHz)

●■ Single supply voltage: 1.8 V to 5.5 V

●■ More than 1 Million Write cycles

●■ More than 40-year data retention

●■ Enhanced ESD Protection

●■ Packages

●–ECOPACK2® (RoHS compliant and Halogen-free)