| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Case/Package | TSSOP-8 |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
| Packaging | Tape & Reel (TR) |
Description
●The MC100EPT25 is a Differential ECL to LVTTL translator. This device requires +3.3 V, −3.3 V to −5.2 V, and ground. The small outline 8−lead package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.
●Features
●•1.1 ns Typical Propagation Delay
●•Maximum Frequency > 275 MHz Typical
●•Operating Range: VCC= 3.0 V to 3.6 V; VEE= −5.5 V to −3.0 V; GND = 0 V
●•24 mA TTL Outputs
●•Q Output Will Default LOW with Inputs Open or at VEE
●•VBBOutput
●•Open Input Default State
●•Safety Clamp on Inputs
●•Pb−Free Packages are Available
ON Semiconductor
9 Pages / 0.13 MByte
ON Semiconductor
Differential LVECL/ECL to LVTTL Translator
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ON SEMICONDUCTOR MC100EPT25DTG ECL-to-LVTTL Translator, 2Input, 24mA, 950 ps, 3V to 3.6V, TSSOP-8
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Translator ECL/LVECL to LVTTL 8Pin TSSOP T/R
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ON SEMICONDUCTOR MC100EPT25DG Differential ECL to 3.3V LVTTL Translator, 1Input, 24mA, 950 ps, 3V to 3.6V, SOIC-8
ON Semiconductor
Translator ECL/LVECL to LVTTL 8Pin SOIC N T/R
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Translator ECL/LVECL to LVTTL 8Pin SOIC N Rail
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Translator ECL/LVECL to LVTTL 8Pin DFN EP T/R
ON Semiconductor
Translator ECL/LVECL to LVTTL 8Pin TSSOP T/R
ON Semiconductor
Translator ECL/LVECL to LVTTL 8Pin TSSOP Rail
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