| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 3.30 V, 3.80 V (max) |
| Case/Package | SOIC-8 |
| Number of Channels | 2 Channel |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
| Packaging | Tube |
| Size-Height | 1.5 mm |
Description
●The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.
●Features
●• 350 ps Typical Propagation Delay
●• <100 ps Output−to−Output Skew
●• Flow Through Pinouts
●• The 100 Series Contains Temperature Compensation
●• LVPECL Operating Range: VCC = 3.0 V to 3.8 V with GND = 0 V
●• When Unused TTL Input is left Open, Q Output will Default High
●• Pb−Free Packages are Available
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7 Pages / 0.14 MByte
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3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator
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ON SEMICONDUCTOR MC100LVELT22DG LVTTL / LVCMOS to Differential LVPECL Translator, LV Family, 2Input, 50mA, 3V to 3.8V, SOIC-8
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ON SEMICONDUCTOR MC100LVELT22DTG Voltage Level Translator, LV Family, 2Input, 50mA, 350 ps, 3.15V to 3.45V, TSSOP-8
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Translator LVCMOS/LVTTL to LVPECL 8Pin SOIC N Rail
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IC TRANSLATOR DUAL 3.3V 8TSSOP
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Translator LVCMOS/LVTTL to LVPECL 8Pin DFN EP T/R
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Translator LVCMOS/LVTTL to LVPECL 8Pin TSSOP T/R
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