MC100LVEP111FARG Datasheet PDF - ON Semiconductor

Description

●The MC100LVEP111 is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions.

●The LVEP111 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device

●Features

●• 85 ps Typical Device−to−Device Skew

●• 20 ps Typical Output−to−Output Skew

●• Jitter Less than 1 ps RMS

●• Maximum Frequency > 3 Ghz Typical

●• VBB Output

●• 430 ps Typical Propagation Delay

●• The 100 Series Contains Temperature Compensation

●• PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V

●• NECL Mode Operating Range: VCC = 0 V with VEE = −2.375 V to −3.8 V

●• Open Input Default State

●• LVDS Input Compatible

●• Fully Compatible with MC100EP111

●• Pb−Free Packages are Available