56F8025 General Description
●• Up to 32 MIPS at 32MHz core frequency
●• DSP and MCU functionality in a unified, C-efficient architecture
●• 32KB (16K x 16) Program Flash
●• 4KB (2K x 16) Unified Data/Program RAM
●• One 6-channel PWM module
●• Two 4-channel 12-bit Analog-to-Digital Converters (ADCs)
●• Two Internal 12-bit Digital-to-Analog Converters (DACs)
●• Two Analog Comparators
●• Three Programmable Interval Timers (PITs)
●• One Queued Serial Communication Interface (QSCI) with LIN slave functionality
●• One Queued Serial Peripheral Interfaces (QSPI)
●• One 16-bit Quad Timer
●• One Inter-Integrated Circuit (I2C) port
●• Computer Operating Properly (COP)/Watchdog
●• On-Chip Relaxation Oscillator
●• Integrated Power-On Reset (POR) and Low-Voltage Interrupt (LVI) module
●• JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging
●• Up to 35 GPIO lines
●• 44-pin LQFP Package
