MC9S12C64 Datasheet PDF - Motorola

Based on Motorola’s market-leading flash technology, members of the MC9S12C-Family deliver the power and flexibility of our 16 Bit core (CPU12) family to a whole new range of cost and space sensitive, general purpose Industrial and Automotive network applications. MC9S12C-Family members are comprised of standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to 128K bytes of Flash EEPROM or ROM, up to 4K bytes of RAM, an asynchronous serial communications in terface (SCI), a serial peripheral interface (SPI), an 8-channel 16-bit timer module (TIM), a 6-channel 8-bit Pulse Width Modulator (PWM), an 8-channel, 10-bit analog-to-digital converter (ADC) and up to one CAN 2.0 A, B software compatible module (MSCAN12).

●Features

●• 16-bit HCS12 CORE

●   — HCS12 CPU

●   — MMC (memory map and interface)

●   — INT (interrupt control)

●   — BDM (background debug mode)

●   — DBG12 (enhanced debug12 module including breakpoints and change-of-flow trace buffer)

●   — Multiplexed Expansion Bus (available only in 80 pin package version)

●• 16-bit HCS12 CPU

●   — Upward compatible with M68HC11 instruction set

●   — Interrupt stacking and programmer’s model identical to M68HC11

●   — Instruction queue

●   — Enhanced indexed addressing

●• Wake-up interrupt inputs

●   — Up to 10-port bits available for wake up interrupt function

●• Memory options

●   — 16K, 32K, 64K, 96K and 128K Byte Flash EEPROM (erasable in 512-byte sectors) or

●   — 16K, 32K, 64K, 96K and 128K Byte ROM

●   — 2K and 4K Byte RAM

●• Analog-to-Digital Converters

●   — One 8-channel module with 10-bit resolution.

●   — External conversion trigger capability

●• Up to one 1M bit per second, CAN 2.0 A, B software compatible modules

●   — Five receive and three transmit buffers

●   — Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

●   — Four separate interrupt channels for receive, transmit, error and wake-up

●   — Low-pass filter wake-up function

●   — Loop-back for self test operation

●• Timer Module (TIM)

●   — 16-bit Counter with 7-bit Prescaler

●   — 8 programmable input capture or output compare channels

●   — Simple PWM Mode

●   — Modulo Reset of Timer Counter

●   — 16-Bit Pulse Accumulator

●   — External Event Counting

●   — Gated Time Accumulation

●• 6 PWM channels

●   — Programmable period and duty cycle

●   — 8-bit 6-channel or 16-bit 3-channel

●   — Separate control for each pulse width and duty cycle

●   — Center-aligned or left-aligned outputs

●   — Programmable clock select logic with a wide range of frequencies

●   — Fast emergency shutdown input

●• Serial interfaces

●   — One asynchronous serial communications interface (SCI)

●   — One synchronous serial peripheral interface (SPI)

●• CRG (Clock Reset Generator Module)

●   — Windowed COP watchdog,

●   — Real time interrupt,

●   — Clock monitor,

●   — Clock generation

●   — Reset Generation

●   — Phase-locked loop clock frequency multiplier

●   — Limp home mode in absence of external clock

●   — Low power 0.5 to 16 MHz crystal oscillator reference clock

●• Operation frequency

●   — 32MHz equivalent to 16MHz Bus Speed for single chip

●   — 32MHz equivalent to 16MHz Bus Speed in expanded bus modes

●   — Option: 50MHz equivalent to 25MHz Bus Speed

●• Internal 2.5V Regulator

●   — Supports an input voltage range from 3.3V-10% to 5.5V

●   — Low power mode capability

●   — Includes low voltage reset (LVR) circuitry

●   — Includes low voltage interrupt (LVI) circuitry

●• 48-Pin LQFP, 52-Pin LQFP or 80-Pin QFP package

●   — Up to 58 I/O lines with 5V input and drive capability

●   — Up to 2 dedicated 5V input only lines (IRQ, XIRQ)

●   — 5V A/D converter inputs and 5V I/O

●• Development support

●   — Single-wire background debug™ mode (BDM)

●   — On-chip hardware breakpoints

●   — Enhanced DBG12 debug features