TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Frequency | 2.00 GHz |
Number of Pins | 16 Pin |
Supply Voltage (DC) | 3.00V (min) |
Case/Package | QFN-16 |
Halogen Free Status | Halogen Free |
Number of Outputs | 2 Output |
Supply Current | 35.0 mA |
Number of Circuits | 1 Circuit |
Number of Positions | 16 Position |
Data Rate | 2.50 Gbps |
Operating Temperature (Max) | 85 ℃ |
Operating Temperature (Min) | -40 ℃ |
Supply Voltage | 3V ~ 3.6V |
Supply Voltage (Max) | 3.6 V |
Supply Voltage (Min) | 3 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Each |
Size-Length | 3 mm |
Size-Width | 3 mm |
Size-Height | 0.95 mm |
Operating Temperature | -40℃ ~ 85℃ |
The NB6N11SMNG is a 1:2 AnyLevel™ input to LVDS fan-out Buffer/Translator has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50R internal termination resistors at the inputs, the NB6N11S is ideal for translating a variety of differential or single-ended clock or data signals to 350mV typical LVDS output levels. It is a differential 1:2 clock or data receiver and will accept AnyLevel input signals of LVPECL/CML/LVCMOS/LVTTL/LVDS. These signals will be translated to LVDS and two identical copies of clock or data will be distributed, operating up to 2GHz or 2.5Gb/s respectively. As such, the NB6N11S is ideal for SONET, GigE, fiber channel, backplane and other clock or data distribution applications.
● 1ps Maximum of RMS clock jitter
● Typically 10ps of data dependent jitter
● 380ps Typical propagation delay
● 120ps Typical rise and fall times
● Functionally compatible with existing 3.3V LVEL/LVEP/EP/SG devices
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