| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 5.00 V, 5.50 V (max) |
| Case/Package | US-8 |
| Halogen Free Status | Halogen Free |
| Number of Outputs | 3 Output |
| Number of Channels | 3 Channel |
| Number of Positions | 8 Position |
| Number of Bits | 3 Bit |
| Power Dissipation | 200 mW |
| Number of Inputs | 3 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 200 mW |
| Supply Voltage | 2.3V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 2.1 mm |
| Size-Width | 2.4 mm |
| Size-Height | 0.8 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The NL37WZ17USG is a high performance Buffer with Schmitt-trigger inputs operating from a 1.65 to 5.5V supply. The NL37WZ17 can be used as a line receiver which will receive slow input signals. The NL37WZ17 is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, it has a greater noise margin than conventional inverters. The NL37WZ17 has hysteresis between the positive-going and the negative-going input thresholds (typically 1V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations.
● Over voltage tolerant inputs and outputs
● LVCMOS Compatible
● Near 0 static supply current substantially reduces system power requirements
● Designed for 1.65 to 5.5V VCC operation
● LVTTL compatible - Interface capability with 5V TTL logic with VCC = 3V
● 24mA Balanced output sink and source capability
● Current drive capability is 24mA at the outputs
● Chip complexity - FET = 94
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