High Performance RISC CPU:
●• C compiler optimized architecture/instruction set
●\- Source code compatible with the PIC16 and PIC17 instruction sets
●• Linear program memory addressing to 32 Kbytes
●• Linear data memory addressing to 1.5 Kbytes
●Peripheral Features:
●• Up to 10 MIPs operation:
●\- DC - 40 MHz osc./clock input
●\- 4 MHz - 10 MHz osc./clock input with PLL active
●• 16-bit wide instructions, 8-bit wide data path
●• Priority levels for interrupts
●• 8 x 8 Single Cycle Hardware Multiplier
●• High current sink/source 25 mA/25 mA
●• Three external interrupt pins
●• Timer0 module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler
●• Timer1 module: 16-bit timer/counter
●• Timer2 module: 8-bit timer/counter with 8-bit
●period register (time-base for PWM)
●• Timer3 module: 16-bit timer/counter
