S-1200B18-M5T1G Datasheet PDF - Seiko

HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR ;•Output voltage: 1.5 V to 5.5 V, selectable in 0.1 V steps. •Low ESR capacitor can be used: A ceramic capacitor of 0.1 μF or more can be used for the output capacitor. •Wide input voltage range: 2.0 V to 10.0 V •High-accuracy output voltage: ±1.0% •Low dropout voltage: 140 mV typ. (3.0 V output product, IOUT = 100 mA) •Low current consumption: During operation: 18 μA typ., 40 μA max. During shutdown: 0.01 μA typ., 1.0 μA max. •Output current: 150 mA output is possible (@ VIN ≥ VOUT(S) + 1.0 V) • High ripple rejection: 70 dB typ. (@ 1.0 kHz, 1.5 V ≤ VOUT ≤ 3.0 V) 65 dB typ. (@ 1.0 kHz, 3.1 V ≤ VOUT ≤ 5.5 V) •Built-in overcurrent protector: Overcurrent of output transistor can be restricted. •Built-in ON/OFF circuit: Ensures long battery life.