| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Frequency | 25 MHz |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00V ~ 6.00V |
| Case/Package | CDIP |
| Number of Outputs | 1 Output |
| Number of Bits | 2 Bit |
| Voltage Nodes | 6.00 V, 5.00 V, 2.00 V |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -55 ℃ |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Operating Temperature | -55℃ ~ 125℃ |
description/ordering information
●The ’HC74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PREand CLRare inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
●Wide Operating Voltage Range of 2 V to 6 V
●Outputs Can Drive Up To 10 LSTTL Loads
●Low Power Consumption, 40-µA Max ICC
●Typical tpd = 15 ns
●±4-mA Output Drive at 5 V
●Low Input Current of 1 µA Max
TI
Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset
TI
Flip Flop D-Type Pos-Edge 2Element 14Pin CDIP Tube
TI
Dual D-type Positive-Edge-Triggered Flip-Flops With Clear And Preset
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
