The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.
●The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.
●The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.
● Meet or Exceed the Requirements of ANSI
●TIA/EIA-644 Standard
● Operate With a Single 3.3-V Supply
● Designed for Signaling Rates of up to
●150 Mbps
● Differential Input Thresholds ±100 mV Max
● Typical Propagation Delay Time of 2.1 ns
● Power Dissipation 60 mW Typical Per
●Receiver at Maximum Data Rate
● Bus-Terminal ESD Protection Exceeds 8 kV
● Low-Voltage TTL (LVTTL) Logic Output
●Levels
● Pin Compatible With AM26LS32, MC3486,
●and µA9637
● Open-Circuit Fail-Safe
● Cold Sparing for Space and High-Reliability
●Applications Requiring Redundancy
