| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 64 Pin |
| Supply Voltage (DC) | 1.65V (min) |
| Case/Package | QFP-64 |
| Number of Positions | 64 Position |
| Input Current | 30 µA |
| Output Voltage (Max) | 0.535 V |
| Operating Temperature (Max) | 105 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 1.65V ~ 1.95V |
| Supply Voltage (Max) | 1.95 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Cut Tape (CT) |
| Operating Temperature | -40℃ ~ 105℃ |
The SN65DSI83-Q1 DSI-to-LVDS bridge features a single-channel MIPI D-PHY receiver front-end configuration with four lanes per channel operating at 1 Gbps per lane and a maximum input bandwidth of 4 Gbps. The bridge decodes MIPI DSI 18-bpp RGB666 and 24-bpp RGB888 packets and converts the formatted video data-stream to an LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz, offering a Single-Link LVDS with four data lanes per link.
●The SN65DSI83-Q1 device can support up to WUXGA 1920 × 1200 at 60 frames per second, at 24 bpp with reduced blanking. The SN65DSI83-Q1 device is also suitable for applications using 60 fps 1366 × 768/1280 × 800 at 18 bpp and 24 bpp. Partial line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.
●The SN65DSI83-Q1 device is implemented in a small outline 10-mm × 10-mm HTQFP package with a 0.5-mm pitch, and operates across a temperature range from –40°C to +105°C.
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