| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 3.00V (min) |
| Case/Package | TSSOP-16 |
| Supply Current | 12 mA |
| Number of Channels | 2 Channel |
| Number of Positions | 16 Position |
| Power Dissipation | 839 W |
| Data Rate | 100 Mbps |
| Input Current (Min) | 20 μA |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 839 mW |
| Supply Voltage | 3V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 5 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.15 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The SN65LVDS051PW is a high-speed differential Line Driver and Receiver uses low-voltage differential signaling to achieve signaling rates as high as 400Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247mV into a 100R load and receipt of 100mV signals with up to 1V of ground potential difference between a transmitter/receiver. This device offers various driver, receiver and enabling combinations in industry-standard footprints. Because this device is intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. The input signal to the receiver is a differential LVDS signal. The output of the device is an LVTTL digital signal. This LVDS receiver requires ±50mV of input signal to determine the correct state of the received signal.
● Receiver has open-circuit fail safe
● Full-duplex signalling rates up to 150Mbps
● Bus-pin ESD exceeds 12kV
● LVTTL input levels are 5V tolerant
● Receiver maintains high input impedance with VCC <1.5V
● Green product and no Sb/Br
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