| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 3.00V (min) |
| Case/Package | SOIC-8 |
| Number of Positions | 8 Position |
| Power Dissipation | 950 W |
| Input Current (Min) | 80 μA |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 950 mW |
| Supply Voltage | 3V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 4.9 mm |
| Size-Width | 3.91 mm |
| Size-Height | 1.58 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The SN65LVDS9637BD is a differential Line Receiver offers improved performance and features that implement the electrical characteristics of low-voltage differential signalling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard, providing a better overall solution for the cabled environment. This generation of products is an extension to TIs overall product portfolio and is not necessarily a replacement for older LVDS receivers. Improved features include an input common-mode voltage range 2V wider than the minimum required by the standard. This will allow longer cable lengths by tripling the allowable ground noise tolerance to 3V between a driver and receiver. Precise control of the differential input voltage thresholds now allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals.
● Active failsafe assures a high-level output with no input
● Inputs remain high-impedance on power-down
● Integrated 110R line termination resistors offered with the LVDT series
● -2 to 4.4V Common-mode input voltage range
● <50mV Differential input thresholds
● 4ns (typical) Propagation delay time
● Green product and no Sb/Br
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