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SN65LVDS96DGG
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SN65LVDS96DGG Datasheet PDF (17 Pages)
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SN65LVDS96DGG Specifications

SN65LVDS96DGG Size & Package

SN65LVDS96DGG Documents

TI
17 Pages / 0.32 MByte
TI
1 Pages / 0.13 MByte

SN65LVDS96 Documents

TI
The SN65LVDS96 LVDS serdes (serializer/deserializer) receiver contains three serial-in 7Bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit
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TEXAS INSTRUMENTS SN65LVDS9638DGKR Differential Line Driver IC, 150Mbps Data Rate, 8kV ESD, 3V to 3.6V, VSSOP-8
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Texas Instruments SN65LVDS96DGG, LVDS Serializer/Deserializer Triple 21Bits LVTTL 1428Mbit/s, 3 → 3.6V, 48Pin
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TEXAS INSTRUMENTS SN65LVDS9638DR Differential Line Driver IC, 150Mbps Data Rate, 8kV ESD, 3V to 3.6V, SOIC-8
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LVDS PHY (<800Mbps) Dual LVDS Transmitter LVDS Driver 0.454V 8Pin VSSOP Tube
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LVDS PHY (<800Mbps) Dual LVDS Receiver LVDS Receiver 150Mbps 8Pin SOIC Tube
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TEXAS INSTRUMENTS SN65LVDS9638DGN Differential Line Driver IC, 150Mbps Data Rate, 8kV ESD, 3V to 3.6V, MSOP-8
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Serdes (Serializer/Deserializer) Receiver 48-TSSOP -40℃ to 85℃
TI
TEXAS INSTRUMENTS SN65LVDS9637DGKR Differential Line Receiver IC, 2 Receivers, 8kV ESD, 3V to 3.6V, MSOP-8
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