| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 4.50V ~ 5.50V |
| Case/Package | TSSOP-14 |
| Number of Outputs | 4 Output |
| Number of Circuits | 4 Circuit |
| Number of Channels | 4 Channel |
| Number of Positions | 14 Position |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 4.90 ns |
| Voltage Nodes | 5.00 V |
| Static Current | 30.0 mA |
| Number of Gates | 4 Gate |
| Output Current Drive | -500 µA |
| Number of Inputs | 4 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 4.5V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 4.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 5 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.05 mm |
| Operating Temperature | -40℃ ~ 85℃ (TA) |
The SN74ABT125PWR is a quadruple bus Buffer Gate features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high. This device is fully specified for hot-insertion applications using IOFF and power-up 3-state. The IOFF circuitry disables the outputs, preventing damaging current backflow through the devices when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver.
● High-drive outputs
● IOFF and power-up 3-state support hot insertion
● Latch-up performance exceeds 500mA per JEDEC standard JESD-17
● <1V at VCC = 5V, TA = 25°C VOLP (output ground bounce)
● Green product and no Sb/Br
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