TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Number of Pins | 20 Pin |
Supply Voltage (DC) | 2.00V ~ 6.00V |
Case/Package | TSSOP-20 |
Number of Outputs | 8 Output |
Output Current | 24 mA |
Number of Circuits | 8 Circuit |
Number of Positions | 20 Position |
Number of Bits | 8 Bit |
Propagation Delay Max (tpd) | 9.50 ns |
Polarity | Non-Inverting |
Voltage Nodes | 5.00 V, 3.30 V |
Output Current Drive | -1.00 mA |
Number of Inputs | 8 Input |
Operating Temperature (Max) | 85 ℃ |
Operating Temperature (Min) | -40 ℃ |
Supply Voltage | 2V ~ 6V |
Supply Voltage (Max) | 6 V |
Supply Voltage (Min) | 2 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Cut Tape (CT) |
Size-Length | 6.5 mm |
Size-Width | 4.4 mm |
Size-Height | 1.15 mm |
Operating Temperature | -40℃ ~ 85℃ |
The SN74AC373PWR is an octal Transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight latches are D-type transparent latches. When the LE input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pull-up components.
● Full parallel access for loading
● Maximum tpd of 9.5ns at 5V
● 3-state Noninverting outputs drive bus lines directly
● Green product and no Sb/Br
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