| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 4.50V ~ 5.50V |
| Case/Package | SOP-14 |
| Number of Outputs | 1 Output |
| Output Voltage | 5.5 V |
| Output Current | 8.00 mA |
| Number of Circuits | 4 Circuit |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 10.0 ns |
| Voltage Nodes | 5.00 V |
| Number of Gates | 4 Gate |
| Output Current Drive | -1.00 mA |
| Number of Inputs | 2 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | 40 ℃ |
| Supply Voltage | 4.5V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 4.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 10.3 mm |
| Size-Width | 5.3 mm |
| Size-Height | 1.95 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The AHCT132 devices are quadruple positive-NAND gates.
●These devices perform the Boolean function Y = (A B)\ or Y = A\ + B\ in positive logic.
●Each circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels for positive- and negative-going signals.
●These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
TI
Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC T/R
TI
NAND Gate 4Element 2IN CMOS 14Pin TSSOP T/R
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC Tube
TI
NAND Gate 4Element 2IN CMOS 14Pin PDIP Tube
TI
NAND Gate 4Element 2IN CMOS 14Pin SOP T/R
TI
NAND Gate 4Element 2IN CMOS 14Pin SSOP T/R
TI
NAND Gate 4Element 2IN CMOS 14Pin TVSOP T/R
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC Tube
TI
NAND Gate 4Element 2IN CMOS 14Pin TSSOP T/R
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
