| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 1.65V ~ 3.60V |
| Case/Package | TSSOP-14 |
| Number of Outputs | 4 Output |
| Number of Circuits | 4 Circuit |
| Number of Channels | 4 Channel |
| Number of Positions | 14 Position |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 2.80 ns |
| Voltage Nodes | 3.30 V, 2.70 V, 2.50 V, 1.80 V |
| Output Current Drive | -1.00 mA |
| Number of Inputs | 4 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 1.65V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 5 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.15 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The SN74ALVC125PW is a quadruple Bus Buffer Gate with 3-state outputs and designed for 1.65 to 3.6V VCC operation. The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
● 2.8ns at 3.3V Propagation delay (tpd)
● ±24mA Output drive at 3.3V
● Latch-up performance exceeds 250mA per JESD 17
● Green product and no Sb/Br
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