| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Number of Pins | 20 Pin |
| Supply Voltage (DC) | 2.00V ~ 6.00V |
| Case/Package | DIP-20 |
| Number of Outputs | 8 Output |
| Output Current | 7.8 mA |
| Number of Circuits | 8 Circuit |
| Number of Positions | 20 Position |
| Number of Bits | 8 Bit |
| Propagation Delay Max (tpd) | 32.0 ns |
| Polarity | Non-Inverting |
| Voltage Nodes | 6.00 V, 5.00 V, 2.00 V |
| Output Current Drive | -1.00 mA |
| Number of Inputs | 8 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 2V ~ 6V |
| Supply Voltage (Max) | 6 V |
| Supply Voltage (Min) | 2 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 24.33 mm |
| Size-Width | 6.35 mm |
| Size-Height | 4.57 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The SN74HC373N is an octal transparent D-Type Latch with 3-state outputs. This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the latch-enable (LE) input is high the Q outputs follow the data (D) inputs. When LE is taken low the Q outputs are latched at the levels that were set up at the D inputs. An output-enable (OE)\ input places the eight outputs in either a normal logic state or the high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE\ does not affect the internal operations of the latch. Old data can be retained or new data can be entered while the outputs are OFF.
● High-current 3-state true outputs can drive up to 15 LSTTL loads
● Full parallel access for loading
● Green product and no Sb/Br
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