| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00V ~ 3.60V |
| Case/Package | TSSOP-14 |
| Number of Outputs | 1 Output |
| Output Current | 24 mA |
| Number of Circuits | 4 Circuit |
| Number of Positions | 14 Position |
| Number of Bits | 4 Bit |
| Propagation Delay Max (tpd) | 4.40 ns |
| Voltage Nodes | 3.30 V, 2.70 V, 2.50 V, 1.80 V |
| Number of Gates | 4 Gate |
| Output Current Drive | -1.00 mA |
| Number of Inputs | 2 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 1.65V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 5 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.15 mm |
| Operating Temperature | -40℃ ~ 125℃ |
The SN74LVC02APW is a quadruple 2-input Positive-NOR Gate. The devices perform the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic. The device operates at a voltage range of 1.65 to 3.6V with inputs accept voltages to 5.5V and maximum tpd of 4.4ns at 3.3V.
● <0.8V at VCC = 3.3V, TA = 25°C typical VOLP (Output ground bounce)
● >2V at VCC = 3.3V, TA = 25°C typical VOHV (Output VOH undershoot)
● Latch-up performance exceeds 250mA per JESD 17
● ESD protection exceeds JESD 22
● Green product and no Sb/Br
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