SN74LVC1G175DBVT Datasheet PDF - TI

The SN74LVC1G175DBVT is a single D-type Flip-flop with asynchronous clear. The SN74LVC1G175 device has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock"s (CLK) rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D.

● Supports down translation to VCC

● 4.3ns at 3.3V Maximum TPD

● Low power consumption

● IOFF supports live insertion, partial-power-down mode and back-drive protection

● Latch-up performance exceeds 100mA per JESD 78

● ESD protection exceeds JESD 22

●This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.