The SN74LVC2G132DCTR is a dual 2-input NAND Gate with Schmitt-trigger inputs. The device performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. The device functions as two independent inverters, but because of Schmitt action, it has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
● ±24mA Output drive at 3.3V
● <0.8V at VCC = 3.3V (typical) VOLP (Output ground bounce)
● >2V at VCC = 3.3V Typical VOHV (Output VOH undershoot)
● 10µA Maximum ICC low power consumption
● Inputs accept voltages to 5.5V
● Maximum tpd of 5.3ns at 3.3V
● Ioff supports live insertion, partial power down mode and back drive protection
● ESD protection exceeds JESD 22
● Latch-up performance exceeds 100mA per JESD 78, Class II
