TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Number of Pins | 24 Pin |
Supply Voltage (DC) | 1.65V ~ 5.50V |
Case/Package | TSSOP-24 |
Number of Outputs | 8 Output |
Number of Circuits | 1 Circuit |
Number of Channels | 8 Channel |
Number of Positions | 24 Position |
Number of Bits | 8 Bit |
Propagation Delay Max (tpd) | 4.20 ns |
Voltage Nodes | 5.00 V, 3.30 V, 2.50 V, 1.80 V |
Output Current Drive | -1.00 mA |
Operating Temperature (Max) | 85 ℃ |
Operating Temperature (Min) | -40 ℃ |
Number of Output Channels | 8 Channel |
Supply Voltage | 1.65V ~ 5.5V |
Supply Voltage (Max) | 5.5 V |
Supply Voltage (Min) | 1.65 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Each |
Size-Length | 7.8 mm |
Size-Width | 4.4 mm |
Size-Height | 1.15 mm |
Operating Temperature | -40℃ ~ 85℃ |
The SN74LVC8T245PW is a non-inverting 8-bit dual-supply Bus Transceiver with configurable voltage-level shifting and three-state outputs. The SN74LVC8T245 is optimized to operate with VCCA and VCCB set. The A-port is designed to track VCCA. The B-port is designed to track VCCB. The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A to B-bus when the B-port outputs are activated and from the B to A-bus when the A-port outputs are activated. The input circuitry on both A and B-ports is always active and must have a logic high or low level applied to prevent excess ICC and ICCZ. The SN74LVC8T245 is designed so that the control pins are supplied by VCCA.
● Control inputs VIH/VIL levels are referenced to VCCA voltage
● If either VCC input is at GND, it is in the high-impedance state
● Latch-up performance exceeds 100mA per JESD 78
● ESD protection exceeds JESD 22
● Green product and no Sb/Br
●This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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