| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 48 Pin |
| Supply Voltage (DC) | 2.00V ~ 3.60V |
| Case/Package | TSSOP-48 |
| Number of Outputs | 16 Output |
| Output Current | 24 mA |
| Number of Circuits | 8 Circuit |
| Number of Positions | 48 Position |
| Number of Bits | 16 Bit |
| Propagation Delay Max (tpd) | 7.00 ns |
| Polarity | Non-Inverting |
| Voltage Nodes | 3.30 V, 2.70 V, 2.50 V, 1.80 V |
| Output Current Drive | -1.00 mA |
| Number of Inputs | 16 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 1.65V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Cut Tape (CT) |
| Size-Length | 12.5 mm |
| Size-Width | 6.1 mm |
| Size-Height | 1.15 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The SN74LVCH16373ADGGR is a 16-bit transparent D-Type Latch with 3-state outputs. It is designed for 1.65 to 3.6V VCC operation. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. It can be used as two 8-bit latches or one 16-bit latch. When the LE input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
● Ioff Supports live insertion, partial-power-down mode and back-drive protection
● Supports mixed-mode signal operation
● Bus hold on data inputs eliminates the need for external pull-up or pull-down resistors
● Latch-up performance exceeds 250mA per JESD 17
● Green product and no Sb/Br
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TEXAS INSTRUMENTS SN74LVCH16373ADL Latch, LVC Family, Transparent, 24mA, 4.2ns, 1.65V, 3.6V, SSOP
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