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SN74S51N3
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SN74S51N3 Datasheet PDF - TI

Manufacturer:TI
Category:Logic Gates
Case Package:PDIP
Description:Dual 2-wide 2input AND-O -Invert Gates 14-PDIP 0 to 70
Documentation:SN74S51N3 Datasheet (25 Pages)Package Outline Dimension on14 Page15 Page16 Page
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SN74S51N3 Datasheet PDF (25 Pages)
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SN74S51N3 Specifications

TYPEDESCRIPTION
Mounting StyleThrough Hole
Number of Pins14 Pin
Supply Voltage (DC)4.75V ~ 5.25V
Case/PackagePDIP
Number of Bits2 Bit
Propagation Delay Max (tpd)5.50 ns
Voltage Nodes5.00 V
Number of Gates2 Gate
Output Current Drive-50.0 µA
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SN74S51N3 Size & Package

TYPEDESCRIPTION
Product Lifecycle StatusObsolete
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SN74S51N3 Documents

SN74S51N3 Datasheet
TI
25 Pages / 0.86 MByte

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