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T2080NSN8TTB Datasheet PDF - NXP
Manufacturer: | NXP |
Category: | Microprocessors |
Case Package: | FCBGA-896 |
Description: | MPU QorIQ T2081 RISC 64Bit 28nm 1.8GHz 896Pin FCBGA Tray |
Documentation: | T2080NSN8TTB Datasheet (3 Pages)T2080NSN8TTB User Reference Manual Guide (31 Pages)T2080NSN8TTB Programming Manual (35 Pages)T2080NSN8TTB Application Note (24 Pages) |
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T2080NSN8TTB Datasheet PDF
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T2080NSN8TTB Datasheet PDF (3 Pages)
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T2080NSN8TTB Specifications
TYPE | DESCRIPTION |
---|---|
Number of Pins | 896 Pin |
Case/Package | FCBGA-896 |
Operating Temperature (Max) | 105 ℃ |
Operating Temperature (Min) | 0 ℃ |
T2080NSN8TTB Size & Package
TYPE | DESCRIPTION |
---|---|
Product Lifecycle Status | Active |
Packaging | Tray |
Operating Temperature | 0℃ ~ 105℃ |
T2080NSN8TTB Environmental
T2080NSN8TTB Export Classifications
T2080NSN8TTB Function Overview
Overview
●The 28 nm QorIQ T2080 and T2081 communications processors bring the architectural innovations of the T series flagship T4240, such as the 1.8 GHz dual-threaded e6500 core, into an eight virtual core mid-range platform at reduced power and price points.
●The T2080 processor is primarily intended to succeed successful P3041 and P2041 mid-range series of quad-core devices as a control plane or integrated control and data plane processor. It provides an excellent migration path, as it offers 2x or better in core capability, cache size, SerDes bandwidth and Ethernet connectivity, within a similar power budget. It also provides a value-engineering opportunity for P4080 customers, as T2080 provides equivalent performance at much lower price and power.
●The T2081 is a smaller-package version of the T2080, which is pin-compatible with the quad-core T1042. This provides T1042 customers an easy upgrade to higher performance if processing requirements increase. It also enables customers to reuse a single board for two different product performance levels.
●MoreLess
●## Features
●### Core Complex
● Four dual-threaded e6500 cores built on Power Architecture® technology
● Up to 1.8 GHz each, 6.0 DMIPS/MHz per core
● Shares a 2 MB L2 cache
● Three levels of instructions: User, supervisor, hypervisor
● Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
● Advanced power management saving modes include state retention during power gating
●### Basic Peripherals and Interconnect
● CoreNet® platform cache
● Hierarchical interconnect fabric
● CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet endpoints
● Additional peripheral interfaces
● Two high-speed USB 2.0 controllers with integrated PHYs
● Enhanced secure digital host controller (SD/MMC/eMMC)
● Enhanced serial peripheral interface (eSPI)
● Four I²C controllers
● Four UARTS
● Integrated flash controller supporting NAND and NOR flash memory
●### Accelerators and Memory Controller
● 64-bit DDR3/3L SDRAM memory controller with ECC support
● Up to 2.1 GT/s
● Memory pre-fetch engine
● DPAA incorporating acceleration for the following functions
● Packet parsing, classification and distribution up to 24Gb/s (FMAN)
● Queue management for scheduling, packet sequencing and congestion management of up to 2^24 queues (QMAN)
● Hardware buffer management for buffer allocation and de-allocation with 64 buffer pools (BMAN)
● Integrated security acceleration (SEC) to 10 Gbps
● Decompression/compression acceleration at up to 17.5 Gbps (DCE)
● Signature detection (PME) to 10Gb/s
● DPAA support of RapidIO® messaging (RMAN) (T2080 only)
●### Networking Elements
● SerDes
● 8 lanes at up to 10GHz
● 8 lanes at up to 8GHz (T2080 only)
● Ethernet interfaces: 8 MACS (7 on T2081) multiplexed over the following options
● Up to four 10 Gb/s MACs supporting XFI/KR, XAUI, and HiGig (two on T2081 supporting XFI/KR only)
● Up to eight SGMII (5 on T2080)
● Up to four 2.5Gb/s SGMII
● Up to two RGMII
● High-speed peripheral interfaces
● Two PCI Express 3.0 controllers (one on T2081)
● Two PCI Express 2.0 controllers (three on T2081)
● Endpoint SR-IOV
● Two Serial RapidIO 2.1 controllers/ports running at up to 5 GHz with Type 11 messaging and Type 9 data streaming support (T2080 only)
● Two Serial ATA (SATA) 2.0 controllers (T2080 only)
● DMA
● Dual eight channel
●### Additional Features
● Support for hardware virtualization and partitioning enforcement
● Extra privileged level for hypervisor support
● Logical to real address translation
● Virtual core aware MMU/TLB
● vMPIC (virtualized interrupt controller)/virtual core capable PPC cores
● vDMA (user level DMA engine)
● PAMUv2 (I/O MMU supporting paging)
● DPAA (Ethernet MAC virtualization, accelerator virtualization)
● Trust architecture secure boot
● Secure boot, secure debug, tamper detection, volatile key storage, alternate image and key revocation
● This product is included in our product longevity program, with assured supply for a minimum of 10 years after launch
● This product is included in our product longevity program, with assured supply for a minimum of 10 years after launchComparison Table
●| T2080 | T2081
●\---|---|---
●SerDes
●| 16| 8
●PCIe
●| 2x Gen3 + 2x Gen2| 1x Gen3 + 3x Gen2
●SRIO
●| 2 + RMan| No
●SATA
●| 2| No
●Aurora
●| Yes| No
●10Gbps MACs
●| Up to 4, with XFI, XAUI, and HiGig| Up to 2 with XFI
●1 Gbps MACs
●| Up to 8| Up to 7
●Package
●| 25 x 25 mm , 896 pins, 0.8mm pitch| 23 x 23 mm, 780 pins, 0.8mm pitch, pin compatible with T1042
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