The TL16C554AIPN is an Asynchronous Communications Element features that each channel performs serial-to-parallel conversion on data characters received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitted by the CPU. The complete status of each channel of the quadruple ACE can be read by the CPU at any time during operation. The information obtained includes the type and condition of the operation performed and any error conditions encountered. The TL16C554A quadruple ACE can be placed in an alternate FIFO mode, which activates the internal FIFOs to allow 16 bytes (plus three bits of error data per byte in the receiver FIFO) to be stored in both receive and transmit modes. In the FIFO mode of operation, there is a selectable auto-flow control feature that can significantly reduce software overhead and increase system efficiency by automatically controlling serial-data flow using RTS output and CTS input signals.
● Consists of four improved TL16C550C ACEs plus steering logic
● Adds or deletes standard asynchronous communication bits to or from the serial-data stream
● Independently controlled transmit, receive, line status and data set interrupts
● False start bit detection
● Complete status reporting capabilities
● Line break detection and generation
● Internal diagnostic capability - Loopback controls for communications link fault isolation
● Internal diagnostic capability - Break, parity, overrun, framing error simulation
● Fully prioritized interrupt system controls
● 3-state Outputs provide TTL drive capabilities for bidirectional data bus and control bus
● Programmable Auto-RTS\ and Auto-CTS\
● CTS controls transmitter in Auto-CTS mode
● RCV FIFO contents and threshold control RTS in Auto-RTS mode
● Green product and no Sb/Br
