description
●The TL16C752B-EP is a dual-universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs,
●automatic hardware/software flow control, and data rates up to 3 Mbps. The TL16C752B-EP offers enhanced features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access.
●Controlled Baseline
●– One Assembly/Test Site, One Fabrication Site
●Extended Temperature Performance of –40°C to 110°C
●Enhanced Diminishing Manufacturing Sources (DMS) Support
●Enhanced Product Change Notification
●Qualification Pedigree†
●Pin Compatible With ST16C2550 With Additional Enhancements
●Up to 1.5-Mbps Baud Rate When Using Crystal (24-MHz Input Clock)
●Up to 3-Mbps Baud Rate When Using Oscillator or Clock Source (48-MHz Input Clock)
●64-Byte Transmit FIFO
●64-Byte Receive FIFO With Error Flags
●Programmable and Selectable Transmit and Receive FIFO Trigger Levels for DMA and nterrupt Generation
●Programmable Receive FIFO Trigger Levels for Software/Hardware Flow Control
●Software/Hardware Flow Control
●– Programmable Xon/Xoff Characters
●– Programmable Auto-RTSand Auto-CTS
●Optional Data Flow Resume by Xon Any Character
●DMA Signaling Capability for Both Received and Transmitted Data
●Supports 3.3-V Operation
●Software Selectable Baud Rate Generator
●Prescaler Provides Additional Divide By Four Function
●Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width
●Programmable Sleep Mode
●Programmable Serial Interface Characteristics
●– 5-, 6-, 7-, or 8-Bit Characters
●– Even, Odd, or No Parity Bit Generation and Detection
●– 1, 1.5, or 2 Stop Bit Generation
●False Start Bit Detection
●Complete Status Reporting Capabilities in Both Normal and Sleep Mode
●Line Break Generation and Detection
●Internal Test and Loopback Capabilities
●Fully Prioritized Interrupt System Controls
●Modem Control Functions (CTS, RTS, DSR, DTR, RI, and CD)
