| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Number of Pins | 8 Pin |
| Case/Package | PDIP-8 |
| Supply Current | 1.7 mA |
| Number of Circuits | 1 Circuit |
| Number of Channels | 1 Channel |
| Common Mode Rejection Ratio | 80dB ~ 98dB |
| Input Offset Drift | 3.20 µV/K |
| Bandwidth | 9.40 MHz |
| Slew Rate | 40.0 V/μs |
| Gain Bandwidth Product | 9.4 MHz |
| Input Offset Voltage | 490 µV |
| Input Bias Current | 20 pA |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Gain Bandwidth | 10 MHz |
| Minimum CMRR Range | 70 dB |
| Supply Voltage (Max) | 38 V |
| Supply Voltage (Min) | 4.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 9.81 mm |
| Size-Width | 6.35 mm |
| Size-Height | 4.57 mm |
| Operating Temperature | -40℃ ~ 85℃ |
description
●The TLE207x series of JFET-input operational amplifiers more than double the bandwidth and triple the slew rate of the TL07x and TL08x families of BiFET operational amplifiers. Texas Instruments Excalibur process yields a typical noise floor of 11.6 nV/√Hz, 17-nV/√Hzensured maximum, offering immediate improvement in noise-sensitive circuits designed using the TL07x. The TLE207x also has wider supply voltage rails, increasing the dynamic signal range for BiFET circuits to ±19 V. On-chip zener trimming of offset voltage yields precision grades for greater accuracy in dc-coupled applications.
● Direct Upgrades to TL05x, TL07x, and TL08x BiFET Operational Amplifiers
● Greater Than 2×Bandwidth (10 MHz) and 3×Slew Rate (45 V/μs) Than TL07x
● Ensured Maximum Noise Floor 17 nV/√Hz
●On-Chip Offset Voltage Trimming for Improved DC Performance
● Wider Supply Rails Increase Dynamic Signal Range to ±19 V
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