| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 200 kHz |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 4.10V (min) |
| Case/Package | SOIC-8 |
| Number of Outputs | 2 Output |
| Input Voltage (DC) | 15.0 V |
| Output Voltage | 500 mV |
| Output Current | 1 A |
| Supply Current | 2.5 mA |
| Number of Positions | 8 Position |
| Power Dissipation | 650 mW |
| Number of Regulated Outputs | 2 Output |
| Rise Time | 25 ns |
| Switching Frequency | 200 kHz |
| Topology | Half-Bridge, Push-Pull |
| Duty Cycle | 50 % |
| Maximum Duty Cycle | 50 % |
| Fall Time | 25 ns |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 650 mW |
| Supply Voltage | 4.3V ~ 15V |
| Supply Voltage (Max) | 15 V |
| Supply Voltage (Min) | 4.1 V |
| Input Voltage | 15 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 4.9 mm |
| Size-Width | 3.91 mm |
| Size-Height | 1.58 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The UCC28084D is a BiCMOS Pulse Width Modulation (PWM) Controller for DC to DC or off-line fixed-frequency current-mode switching power supplies. The dual output stages are configured for the push-pull topology. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 110ns, limiting each output"s duty cycle to less than 50%. The major differences include the addition of a programmable slope compensation ramp to the CS signal and the removal of the error amplifier. The current flowing out of the ISET pin through an external resistor is monitored internally to set the magnitude of the slope compensation function. This device also includes an internal discharge transistor from the CS pin to ground, which is activated at each clock cycle after the pulse is terminated. This discharges any filter capacitance on the CS pin during each cycle and helps minimize filter capacitor values and current sense delay.
● Programmable slope compensation
● Cycle-by-cycle current limiting
● Current sense discharge transistor to improve dynamic response
● Internally trimmed bandgap reference
● Undervoltage lockout with hysteresis
● Green product and no Sb/Br
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