● High-performance XC800 Core
● compatible with standard 8051 processor
● two clocks per machine cycle architecture (for memory access without wait state)
● two data pointers
● On-chip memory
● 8 Kbytes of Boot ROM
● 256 bytes of RAM
● 512 bytes of XRAM
● 4/8/16 Kbytes of Flash; or 8/16 Kbytes of ROM, with additional 4 Kbytes of Flash (includes memory protection strategy)
● I/O port supply at 3.3 V/5.0 V and core logic supply at 2.5 V (generated by embedded voltage regulator)
● Reset generation
● Power-On reset
● Hardware reset
● Brownout reset for core logic supply
● Watchdog timer reset
● Power-Down Wake-up reset
● On-chip OSC and PLL for clock generation
● PLL loss-of-lock detection
● Power saving modes
● slow-down mode
● idle mode
● power-down mode with wake-up capability via RXD or EXINT0
● clock gating control to each peripheral
● Programmable 16-bit Watchdog Timer (WDT)
● Four ports
● 19 pins as digital I/O
● 8 pins as digital/analog input
● 8-channel, 10-bit ADC
● Three 16-bit timers
● Timer 0 and Timer 1 (T0 and T1)
● Timer 2
● Capture/compare unit for PWM signal generation (CCU6)
● Full-duplex serial interface (UART)
● Synchronous serial channel (SSC)
● On-chip debug support
● 1 Kbyte of monitor ROM (part of the 8-Kbyte Boot ROM)
● 64 bytes of monitor RAM
● PG-TSSOP-38 pin package
● Temperature range TA:
● SAF (-40 to 85 °C)
● SAK (-40 to 125 °C)
