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ADAU1452 Datasheet - ADI
| Manufacturer: | ADI |
| Description: | SigmaDSP Digital Audio Processor |
| Pictures: |
ADAU1452Datasheet PDF
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ADAU1452/ADAU1451/ADAU1450 Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DGND
DGND
DGND
DGND
DVDD
SDATA_OUT3
BCLK_OUT3
LRCLK_OUT3/MP9
SDATA_OUT2
BCLK_OUT2
LRCLK_OUT2/MP8
MP7
MP6
SDATA_OUT1
BCLK_OUT1
LRCLK_OUT1/MP5
SDATA_OUT0
BCLK_OUT0
LRCLK_OUT0/MP4
IOVDD
DGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
ADAU1452/
ADAU1451/
ADAU1450
TOP VIEW
DVDD
SDATA_IN3
LRCLK_IN3/MP13
BCLK_IN3
SDATA_IN2
LRCLK_IN2/MP12
BCLK_IN2
THD_P
THD_M
SDATA_IN1
LRCLK_IN1/MP11
BCLK_IN1
SDATA_IN0
LRCLK_IN0/MP10
BCLK_IN0
IOVDD
DGND
IOVDD
VDRIVE
SPDIFIN
SPDIFOUT
AGND
AVDD
AUXADC0
AUXADC1
AUXADC2
AUXADC3
AUXADC4
AUXADC5
PGND
PVDD
PLLFILT
DGND
IOVDD
DVDD
XTALIN/MCLK
XTALOUT
CLKOUT
RESET
DGND
SS_M/MP0
MOSI_M/MP1
SCL_M/SCLK_M/MP2
SDA_M/MISO_M/MP3
MISO/SDA
SCLK/SCL
MOSI/ADDR1
SS/ADDR0
SELFBOOT
DVDD
DGND
11486-002
NOTES
1. THE EXPOSED PAD MUST BE GROUNDED BY SOLDERING IT TO A COPPER SQUARE
OF EQUIVALENT SIZE ON THE PCB. IDENTICAL COPPER SQUARES MUST EXIST ON
ALL LAYERS OF THE BOARD, CONNECTED BY VIAS, AND THEY MUST BE CONNECTED
TO A DEDICATED COPPER GROUND LAYER WITHIN THE PCB.
Figure 12. Pin Configuration
Table 23. Pin Function Descriptions
Pin
No. Mnemonic
Internal Pull
Resistor Description
1 DGND None Digital and I/O Ground Reference. Tie all DGND, AGND, and PGND pins directly together in
a common ground plane.
2 IOVDD None Input/Output Supply, 1.8 V − 10% to 3.3 V + 10%. Bypass this pin with decoupling capacitors to
Pin 1 (DGND).
3 VDRIVE None PNP Bipolar Junction Transistor-Base Drive Bias Pin for the Digital Supply Regulator. Connect
VDRIVE to the base of an external PNP pass transistor (STD2805 is recommended). If an
external supply is provided directly to DVDD, connect the VDRIVE pin to ground.
4 SPDIFIN None Input to the Integrated Sony/Philips Digital Interface Format Receiver. Disconnect this pin when
not in use. This pin is internally biased to IOVDD/2. This pin is nonfunctional on the ADAU1450
and should be left disconnected.
5 SPDIFOUT Configurable Output from the Integrated Sony/Philips Digital Interface Format Transmitter. Disconnect this
pin when not in use. This pin is internally biased to IOVDD/2. This pin is nonfunctional on the
ADAU1450 and should be left disconnected.
6 AGND None Analog Ground Reference. Tie all DGND, AGND, and PGND pins directly together in a common
ground plane.
7 AVDD None Analog (Auxiliary ADC) Supply. Must be 3.3 V ± 10%. Bypass this pin with decoupling capacitors
to Pin 6 (AGND).
8 AUXADC0 None Auxiliary ADC Input Channel 0. This pin reads an analog input signal and uses its value in the
DSP program. Disconnect this pin when not in use.
9 AUXADC1 None Auxiliary ADC Input Channel 1. This pin reads an analog input signal and uses its value in the
DSP program. Disconnect this pin when not in use.
Rev. C | Page 18 of 180