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R01DS0053EJ0100 Rev. 1.00 Page 1 of 97
Feb 21, 2012
RL78/G14
RENESAS MCU
True Low Power Platform (as low as 66 A/MHz, and 0.60 A for RTC + LVD), 1.6 V to 5.5 V
operation, 16 to 256 Kbyte Flash, 44 DMIPS at 32 MHz, for General Purpose Applications
Datasheet
1. OUTLINE
1.1 Features
Ultra-Low Power Technology
• 1.6 V to 5.5 V operation from a single supply
• Stop (RAM retained): 0.24
A, (LVD enabled): 0.32 A
• Halt (RTC + LVD): 0.60
A
• Snooze: T.B.D
• Operating: 66
A/MHz
16-bit RL78 CPU Core
• Delivers 44 DMIPS at maximum operating frequency of
32 MHz
• Instruction execution: 86% of instructions can be
executed in 1 to 2 clock cycles
• CISC architecture (Harvard) with 3-stage pipeline
• Multiply signed & unsigned: 16 x 16 to 32-bit result in 1
clock cycle
• MAC: 16 x 16 to 32-bit result in 2 clock cycles
• 16-bit barrel shifter for shift & rotate in 1 clock cycle
• 1-wire on-chip debug function
Code Flash Memory
• Density: 16 KB to 256 KB
• Block size: 1KB
• On-chip single voltage flash memory with protection
from block erase/writing
• Self-programming with secure boot swap function and
flash shield window function
Data Flash Memory
• Data flash with background operation
• Data flash size: 4 KB to 8 KB size options
• Erase cycles: 1 Million (typ.)
• Erase/programming voltage: 1.8 V to 5.5 V
RAM
• 2.5 KB to 24 KB size options
• Supports operands or instructions
• Back-up retention in all modes
High-speed On-chip Oscillator
• 32 MHz with +/- 1% accuracy over voltage (1.8 V to
5.5 V) and temperature (-20°C to 85°C)
• Pre-configured settings: 64 MHz,48 MHz,32 MHz,
24 MHz, 16 MHz, 12 MHz, 8 MHz, 4 MHz & 1 MHz
• 64 MHz, 48 MHz for timer RD
Reset and Supply Management
• Power-on reset (POR) monitor/generator
• Low voltage detection (LVD) with 14 setting options
(Interrupt and/or reset function)
General Purpose I/O
• 5 V tolerant, high-current (up to 20 mA per pin)
• Open-drain, on-chip pull-up resistor
Data Transfer Controller (DTC)
• 39 sources & 24 different settings
• Transfer data: 8 bits/16 bits
• Normal mode and repeat mode
Event Link Controller (ELC)
• Reduce interrupt intervention
• Link 26 events to specified peripheral function
Multiple Communication Interfaces
• Up to 8 x I
2
C master
• Up to 2 x I
2
C multi-master
• Up to 8 x CSI/SPI (7-, 8-bit)
• Up to 4 x UART (7-, 8-, 9-bit)
• Up to 1 x LIN
Extended-Function Timers
• Multi-function 16-bit timers: Up to 8 channels
• Motor control timer (3 ph - complementary mode)
• Timer with encoder function: 16-bit, 1 channel
• Real-time clock (RTC): 1 channel (full calendar and
alarm function with watch correction function)
• Interval timer: 12-bit, 1 channel
• 15 kHz watchdog timer: 1 channel (window function)
Rich Analog
• ADC: Up to 20 channels, 10-bit resolution, 2.1 s
conversion time
• Supports 1.6 V
• 2 x window comparators, with ELC connection
• D/A converter: 2 channels, 8-bit resolution
• Internal voltage reference (1.45 V)
• On-chip temperature sensor
Safety Features (IEC or UL 60730 compliance)
• Flash memory CRC calculation
• RAM parity error check
• RAM write protection
• SFR write protection
• Illegal memory access detection
• Clock stop/frequency detection
• ADC self-test
• I/O port read back function (echo)
Operating Ambient Temperature
• Standard: -40°C to + 85°C
• Extended: -40°C to + 105°C <under planning>
Package Type and Pin Count
From 4 mm x 4 mm to 14 mm x 20 mm
QFP: 32, 44, 48, 52, 64, 80,100
QFN: 32, 40, 48
SSOP: 30
LGA: 36, 64
R01DS0053EJ0100
Rev. 1.00
Feb 21, 2012
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