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TLV320ADC3101 Datasheet PDF

Part Series:TLV320ADC3101 Series
Category:A/D,D/A Converters
Description:Dual ADC Delta-Sigma 96KSPS 16Bit Serial 24Pin VQFN EP T/R
Document:TLV320ADC3101IRGER Datasheet PDF (92 Pages)

TLV320ADC3101IRGER - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
24 Pin
Case/Package
VQFN-24
Number of Channels
3 Channel
Power Dissipation
1700 W
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TLV320ADC3101IRGER - TI Function Overview

The TLV320ADC3101 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101 ideal for battery-powered portable equipment.
The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.
A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.
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