74HC4051D Datasheet PDF - Nexperia

The 74HC4051D is a 8-channel Analog Multiplexer/Demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. The 74HC4051-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A. VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2 and E). The VCC to GND ranges are 2 to 10V for 74HC4051-Q100. The analog inputs/outputs (Y0 to Y7 and Z) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).