74HC85D,652 Datasheet PDF - Nexperia

The 74HC85D is a 4-bit CMOS Magnitude Comparator pin compatible with low power Schottky TTL (LSTTL). It can be expanded to almost any length. It performs the comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at the outputs. The 4-bit inputs are weighted, where A3 and B3 are the most significant bits. The upper part of the table describes the normal operation under all conditions that will occur in a single device or in a series expansion scheme. In the upper part of the table the three outputs are mutually exclusive. In the lower part of the table, the outputs reflect the feed forward conditions that exist in the parallel expansion scheme. For words greater than 4-bits, units can be cascaded by connecting outputs QA<Β, QA>B and QA=B to the corresponding inputs of the significant comparator.