| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 59 MHz |
| Number of Pins | 14 Pin |
| Capacitance | 3.5 pF |
| Case/Package | SOIC-14 |
| Number of Outputs | 1 Output |
| Output Current | 4 mA |
| Number of Circuits | 2 Circuit |
| Number of Channels | 2 Channel |
| Number of Positions | 14 Position |
| Clock Speed | 59 MHz |
| Number of Bits | 2 Bit |
| Power Dissipation | 0.5 W |
| Quiescent Current | 80 µA |
| Input Capacitance | 3.5 pF |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 4.5V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 4.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 8.75 mm |
| Size-Width | 4 mm |
| Size-Height | 1.45 mm |
| Operating Temperature | -40℃ ~ 125℃ |
The 74HCT74D is a dual positive edge triggered D-type Flip-flop has individual data (nD), clock (nCP), set (nSD\\) and reset (nRD\\) inputs and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the low-to-high clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
● Symmetrical output impedance
● Low power dissipation
● High noise immunity
● Balanced propagation delays
● TTL Input level
● Complies with JEDEC standard No. 7A
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