| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 5 Pin |
| Supply Voltage (DC) | 1.65V (min) |
| Case/Package | SOT-753 |
| Number of Outputs | 1 Output |
| Output Current | 12.0 mA |
| Number of Channels | 1 Channel |
| Number of Positions | 5 Position |
| Power Dissipation | 250 mW |
| Number of Gates | 6 Gate |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 250 mW |
| Supply Voltage | 1.65V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 1.65 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Height | 1 mm |
| Operating Temperature | -40℃ ~ 125℃ (TA) |
The 74LVC1G07GV,125 is a non-inverting Buffer with open-drain output. The open drain output can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
● High noise immunity
● CMOS low power consumption
● Direct interface with TTL levels
● Complies with JEDEC standard
● 5V Tolerant input/output for interfacing with 5V logic
● Latch-up performance exceeds 250mA
● Inputs accept voltages up to 5V
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