DESCRIPTION
●The 74VHC125 is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
●The device requires the 3-STATE control input G to be set high to place the output in to the high impedance state.
●Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
●All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
●■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
●■ LOW POWER DISSIPATION:
● ICC = 4 µA (MAX.) at TA=25°C
●■ HIGH NOISE IMMUNITY:
● VNIH = VNIL = 28% VCC (MIN.)
●■ POWER DOWN PROTECTION ON INPUTS
●■ SYMMETRICAL OUTPUT IMPEDANCE:
● |IOH| = IOL = 8mA (MIN)
●■ BALANCED PROPAGATION DELAYS:
● tPLH = tPHL
●■ OPERATING VOLTAGE RANGE:
● VCC(OPR) = 2V to 5.5V
●■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125
●■ IMPROVED LATCH-UP IMMUNITY
●■ LOW NOISE: VOLP = 0.8V (MAX.)
