The HC109 and HCT109 are dual J-K\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).
●The flip-flop is set and reset by active-low S\ and R\, respectively. A low on both the set and reset inputs simultaneously will force both Q and Q\ outputs high. However, both set and reset going high simultaneously results in an unpredictable output condition.
● Asynchronous Set and Reset
● Schmitt Trigger Clock Inputs
● Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, A = 25°C
● Fanout (Over Temperature Range)
● Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
● Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
● Wide Operating Temperature Range . . . -55°C to 125°C
● Balanced Propagation Delay and Transition Times
● Significant Power Reduction Compared to LSTTL Logic ICs
● HC Types
● 2V to 6V Operation
● High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
● HCT Types
● 4.5V to 5.5V Operation
● Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
● CMOS Input Compatibility, Il 1µA at VOL, VOH
