| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 32 Pin |
| Supply Voltage (DC) | 5.00 V |
| Case/Package | SOJ-32 |
| Number of Positions | 32 Position |
| Clock Speed | 100 MHz |
| Number of Bits | 8 Bit |
| Access Time | 10 ns |
| Memory Size | 125000 B |
| Access Time(Max) | 10 ns |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 4.5V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 4.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 21.08 mm |
| Size-Width | 0.405 in |
| Size-Height | 3.05 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The CY7C109D-10VXI is a 1MB high-performance CMOS Static Random Access Memory (SRAM) organized as 131072 words by 8-bit. Easy memory expansion is provided by an active LOW chip enable, an active HIGH chip enable, an active LOW output enable and tri-state drivers. The eight input and output pins are placed in a high-impedance state. Write to the device by taking chip enable one and write enable inputs LOW and chip enable two input HIGH. Data on the eight I/O pins is then written into the location specified on the address pins. Read from the device by taking chip enable one and output enable LOW while forcing write enable and chip enable two HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. The CY7C109D device is suitable for interfacing with processors that have TTL I/P levels. It is not suitable for processors that require CMOS I/P levels.
● Pin and function-compatible with CY7C109B/CY7C1009B
● High speed - 10ns
● Low active power
● Low CMOS standby power
● 2V Data retention
● Automatic power-down when deselected
● TTL-compatible inputs and outputs
● Easy memory expansion with CE and OE
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