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2010 - 2015 Microchip Technology Inc. DS00001875A-page 111
LAN950x
5.14 Configuration Straps
Configuration straps are multi-function pins that are driven as outputs during normal operation. During a Power-On
Reset (POR) or a External Chip Reset (nRESET), these outputs are tri-stated. The high or low state of the signal is
latched following de-assertion of the reset and is used to determine the default configuration of a particular feature. Con-
figuration strap signals are noted in Section 3.0, "Pin Description and Configuration," on page 11.
Configuration straps are latched as a result of a Power-On Reset (POR) or a External Chip Reset (nRESET).
bit Configuration straps include internal resistors in order to prevent the signal from floating when unconnected. If a par-
ticular configuration strap is connected to a load, an external pull-up or pull-down should be used to augment the internal
resistor to ensure that it reaches the required voltage level prior to latching. The internal resistor can also be overridden
by the addition of an external resistor.
Note 1: The system designer must ensure that configuration straps meet the timing requirements specified in Sec-
tion 8.5.3, "Reset and Configuration Strap Timing," on page 197 and Section 8.5.2, "Power-On Configura-
tion Strap Valid Timing," on page 196. If configuration straps are not at the correct voltage level prior to being
latched, the device may capture incorrect strap values.
2: Configuration straps must never be driven as inputs. If required, configuration straps can be augmented, or
overridden with external resistors.

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