| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 98 MHz |
| Number of Pins | 100 Pin |
| Supply Voltage (DC) | 3.30 V |
| Case/Package | TQFP-100 |
| Number of Positions | 100 Position |
| Number of Gates | 2500 Gate |
| Number of I/O Pins | 80 IO |
| Number of Inputs and Outputs | 80 Input |
| Operating Temperature (Max) | 70 ℃ |
| Operating Temperature (Min) | 0 ℃ |
| Supply Voltage | 3.3 V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tray |
| Size-Length | 14 mm |
| Size-Width | 14 mm |
| Size-Height | 1 mm |
| Operating Temperature | 0℃ ~ 70℃ |
The EPM3128ATC100-10N is an EEPROM Complex Programmable Logic Device with 2500 usable gates and 128 macro cells. MAX 3000A CPLD is a high-performance, CMOS EEPROM-based programmable logic devices (PLDs) built on a MAX® architecture. Programmable interconnect array (PIA) continuous routing structure for fast, predictable performance. The MAX 3000A architecture supports 100% transistor-to-transistor logic (TTL) emulation and high-density small-scale integration (SSI), medium-scale integration (MSI) and large-scale integration (LSI) logic functions.
● Enhanced ISP algorithm for faster programming
● Hot-socketing support
● PCI compatible
● Bus-friendly architecture including programmable slew-rate control
● Open-drain output option
● Programmable power-saving mode for a power reduction of over 50% in each macro cell
● Programmable security bit for protection of proprietary designs
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CPLD MAX 3000A Family 2.5K Gates 128 Macro Cells 98MHz CMOS Technology 3.3V 100Pin TQFP
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Altera
CPLD MAX 3000A Family 2.5K Gates 128 Macro Cells 98MHz CMOS Technology 3.3V 100Pin TQFP
Intel
IC CPLD 128MC 10NS 100TQFP
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