| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 14 Pin |
| Case/Package | SOIC-14 |
| Supply Current | 1 mA |
| Number of Circuits | 4 Circuit |
| Number of Channels | 4 Channel |
| Number of Positions | 14 Position |
| Bandwidth | 3 MHz |
| Slew Rate | 2.00 V/μs |
| Gain Bandwidth Product | 3 MHz |
| Input Offset Voltage | 1 µV |
| Input Bias Current | 90 pA |
| Operating Temperature (Max) | 70 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Gain Bandwidth | 3 MHz |
| Minimum CMRR Range | 120 dB |
| Supply Voltage | 2.7V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
| Packaging | Each |
| Size-Height | 1.5 mm |
| Operating Temperature | 0℃ ~ 70℃ |
The LTC2052HVCS#PBF is a quad zero-drift Operational Amplifier operates from a single 2.7V supply and support ±5V applications. The current consumption is 750µA per op amp. The LTC2052, despite their miniature size, feature uncompromising DC performance. The typical input offset voltage and offset drift is 0.5µV and 10nV/°C. The almost zero DC offset and drift are supported with a power supply rejection ratio (PSRR) and common mode rejection ratio (CMRR) of more than 130dB. The input common mode voltage ranges from the negative supply up to typically 1V from the positive supply. The LTC2052 have an enhanced output stage capable of driving loads as low as 2kR to both supply rails. The open-loop gain is typically 140dB. The LTC2052 feature a 1.5µVP-P DC to 10Hz noise and a 3MHz gain-bandwidth product.
● 3µV Maximum offset voltage
● 30nV/°C Maximum offset voltage drift
● 1.5µVP-P (0.01Hz to 10Hz typical) Noise
● 140dB (typical) Voltage gain
● 130dB (typical) PSRR
● 130dB (typical) CMRR
● 0.75mA (typical) Per amplifier supply current
● Extended common mode input range
● Output swings rail-to-rail
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