| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 3.30 V, 3.60 V (max) |
| Case/Package | SOL |
| Number of Circuits | 1 Circuit |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
| Packaging | Tube |
Description
●The MC100EPT26 is a 1:2 Fanout Differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used only +3.3 V and ground are required. The small outline 8−lead package and the 1:2 fanout design of the EPT26 makes it ideal for applications which require the low skew duplication of a signal in a tightly packed PC board.
●Features
●• 1.4 ns Typical Propagation Delay
●• Maximum Frequency > 275 MHz Typical
●• The 100 Series Contains Temperature Compensation
●• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
●• 24 mA TTL outputs
●• Q Outputs Will Default LOW with Inputs Open or at VEE
●• VBB Output
●• Pb−Free Packages are Available
ON Semiconductor
4 Pages / 0.17 MByte
ON Semiconductor
9 Pages / 0.13 MByte
ON Semiconductor
8 Pages / 0.15 MByte
ON Semiconductor
3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL Translator
ON Semiconductor
ON SEMICONDUCTOR MC100EPT26DTG Level Translator, 1Channel, 2Input, 24mA, 1.5ns, 3V to 3.6V, TSSOP-8
ON Semiconductor
ON SEMICONDUCTOR MC100EPT26DG Level Translator, 1Channel, 2Input, 24mA, 1.5ns, 3V to 3.6V, SOIC-8
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin SOIC N T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin TSSOP T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin DFN EP T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin SOIC N Rail
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin TSSOP T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin SOIC N T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin TSSOP Rail
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.
