| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Case/Package | DFN-8 |
| Halogen Free Status | Halogen Free |
| Number of Circuits | 1 Circuit |
| Number of Channels | 2 Channel |
| Number of Bits | 1 Bit |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Number of Output Channels | 1 Channel |
| Supply Voltage | 3V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Operating Temperature | -40℃ ~ 85℃ (TA) |
Description
●The MC100EPT26 is a 1:2 Fanout Differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used only +3.3 V and ground are required. The small outline 8−lead package and the 1:2 fanout design of the EPT26 makes it ideal for applications which require the low skew duplication of a signal in a tightly packed PC board.
●Features
●• 1.4 ns Typical Propagation Delay
●• Maximum Frequency > 275 MHz Typical
●• The 100 Series Contains Temperature Compensation
●• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
●• 24 mA TTL outputs
●• Q Outputs Will Default LOW with Inputs Open or at VEE
●• VBB Output
●• Pb−Free Packages are Available
ON Semiconductor
9 Pages / 0.15 MByte
ON Semiconductor
9 Pages / 0.06 MByte
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37 Pages / 0.33 MByte
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3 Pages / 0.05 MByte
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20 Pages / 0.87 MByte
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5 Pages / 0.28 MByte
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin DFN EP T/R
ON Semiconductor
Translator LVDS/LVPECL to LVTTL 8Pin DFN EP T/R
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