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MC74HC139ADR2G
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MC74HC139ADR2G Datasheet PDF - ON Semiconductor

Manufacturer:ON Semiconductor
Category:Logic ICs
Case Package:SOIC-16
Description:* Output Drive Capability: 10 LSTTL Loads * Outputs Directly Interface to CMOS, NMOS and TTL * Operating Voltage Range: 2.0 to 6V * Low Input Current: 1mA * High Noise Immunity Characteristic of CMOS Devices * In Compliance with the Requirements Defined by JEDEC Standard No. 7A * Chip Complexity: 100 FETs or 25 Equivalent Gates * Pb-Free Packages are Available*
Documentation:MC74HC139ADR2G Datasheet (10 Pages)Pinout Diagram on2 Page6 PageHot
Package Outline Dimension on7 Page8 Page9 Page
Package Footprint Pad Layout on8 Page9 Page
Part Numbering System on1 Page2 Page10 Page
Pictures:
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MC74HC139ADR2G Datasheet PDF (10 Pages)
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MC74HC139ADR2G Specifications

TYPEDESCRIPTION
Mounting StyleSurface Mount
Number of Pins16 Pin
Supply Voltage (DC)2.00V (min)
Case/PackageSOIC-16
Halogen Free StatusHalogen Free
Number of Outputs4 Output
Contacts TypeDP4T
Number of Circuits2 Circuit
Number of Positions16 Position
Number of Bits2 Bit
Number of Inputs2 Input
Operating Temperature (Max)125 ℃
Operating Temperature (Min)-55 ℃
Supply Voltage2V ~ 6V
Supply Voltage (Max)6 V
Supply Voltage (Min)2 V
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MC74HC139ADR2G Size & Package

TYPEDESCRIPTION
Product Lifecycle StatusActive
PackagingTape & Reel (TR)
Size-Length10 mm
Size-Width4 mm
Size-Height1.5 mm
Operating Temperature-55℃ ~ 125℃
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MC74HC139ADR2G Documents

MC74HC139ADR2G Datasheet
ON Semiconductor
10 Pages / 0.13 MByte
MC74HC139ADR2G Other Datasheet PDF
ON Semiconductor
16 Pages / 0.18 MByte
MC74HC139ADR2G Drawing Diagrams
ON Semiconductor
2 Pages / 0.03 MByte

MC74HC139ADR2 Documents

MC74HC139ADR2 Datasheet PDF
ON Semiconductor
Decoder/Demultiplexer Dual 2-to-4 16Pin SOIC T/R
MC74HC139ADR2G Datasheet PDF
ON Semiconductor
* Output Drive Capability: 10 LSTTL Loads * Outputs Directly Interface to CMOS, NMOS and TTL * Operating Voltage Range: 2.0 to 6V * Low Input Current: 1mA * High Noise Immunity Characteristic of CMOS Devices * In Compliance with the Requirements Defined by JEDEC Standard No. 7A * Chip Complexity: 100 FETs or 25 Equivalent Gates * Pb-Free Packages are Available*
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