| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Number of Pins | 5 Pin |
| Operating Voltage | 2.3V ~ 6V |
| Case/Package | TO-220-5 |
| Number of Outputs | 1 Output |
| Input Voltage (DC) | 2.30V (min) |
| Output Voltage | 1.8 V |
| Output Current | 1 A |
| Supply Current | 220 μA |
| Number of Positions | 5 Position |
| Quiescent Current | 120 µA |
| Output Capacitor Type | Ceramic |
| voltage rating | 250 mV |
| Input Voltage (Max) | 6 V |
| Input Voltage (Min) | 2.3 V |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Accuracy | ±0.5 % |
| Supply Voltage (Max) | 6 V |
| Supply Voltage (Min) | 2.3 V |
| Input Voltage | 2.3V ~ 6V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 0.42 in |
| Size-Height | 0.65 in |
| Operating Temperature | -40℃ ~ 125℃ |
The MCP1826/MCP1826S is a 1000 mA Low Dropout (LDO) linear regulator that provides high current and low output voltages. The MCP1826 comes in a fixed or adjustable output voltage version, with an output voltage range of 0.8 V to 5.0 V. The 1000 mA output current capability, combined with the low output voltage capability, make the MCP1826 a good choice for new sub-1.8 V output voltage LDO applications that have high current demands. The MCP1826S is a 3-pin fixed voltage version. The MCP1826/MCP1826S is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. Only 1 µF of output capacitance is needed to stabilize the LDO. Using CMOS construction, the quiescent current consumed by the MCP1826/MCP1826S is typically less than 120 µA over the entire input voltage range, making it attractive for portable computing applications that demand high output current. The MCP1826 versions have a Shutdown (SHDN) pin. When shut down, the quiescent current is reduced to less than 0.1 µA. On the MCP1826 fixed output versions the scaled down output voltage is internally monitored and a power good (PWRGD) output is provided when the output is within 92% of regulation (typical). The PWRGD delay is internally fixed at 200 µs (typical).
●The over temperature and short circuit current-limiting provide additional protection for the LDO during system fault conditions.
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